Explore Projects
Discover 26 open source projects
Showing 1-20 of 26 projects
jopohl/urh
Universal Radio Hacker: Investigate wireless protocols and build IoT & security tools in Python.
merbanan/rtl_433
A C-based program to decode radio transmissions from various devices on the ISM bands and other frequencies.
youngsoft/MyLinearLayout
A powerful iOS UI framework that integrates features from Android, iOS AutoLayout, CSS, and Bootstrap for building apps.
YosysHQ/yosys
Yosys is an open-source synthesis suite for register-transfer level (RTL) designs in VHDL, Verilog, and SystemVerilog.
Oros42/IMSI-catcher
This Python program allows you to detect and view IMSI numbers of nearby cellphones.
chipsalliance/rocket-chip
Rocket Chip is a Scala-based generator for RISC-V-based SoCs, used for chip design and development.
f4exb/sdrangel
An open-source software-defined radio (SDR) platform supporting a variety of hardware devices.
merakiuilabs/merakiui
A collection of responsive Tailwind CSS components for building modern and visually appealing web applications.
The-OpenROAD-Project/OpenROAD
OpenROAD is an open-source, unified application that implements an RTL-to-GDS flow for circuit design and analysis.
layoutBox/PinLayout
Fast Swift Views layouting without auto layout, providing full control and blazing fast performance.
bemasher/rtlamr
An rtl-sdr receiver for Itron ERT compatible smart meters operating in the 900MHz ISM band.
SpinalHDL/SpinalHDL
SpinalHDL is a Scala-based hardware description language for FPGA and RTL development.
ainfosec/FISSURE
A powerful RF and reverse engineering framework for developers working with wireless technologies and SDR.
The-OpenROAD-Project/OpenLane
An automated RTL to GDSII flow for ASIC design and optimization based on OpenROAD, Yosys, Magic, and more.
MohammadYounes/rtlcss
A JavaScript framework for transforming CSS from Left-to-Right (LTR) to Right-to-Left (RTL) layout.
wiedehopf/tar1090
An improved web interface for ADS-B decoders like readsb and dump1090-fa for tracking aircraft in real-time.
pulp-platform/axi
AXI SystemVerilog IP modules and verification infrastructure for high-performance on-chip communication.
kane50613/takumi
A Rust-based library that provides faster and enhanced rendering of JSX to images, with support for next/og, satori, variable fonts, RTL, and more.
xmikos/qspectrumanalyzer
A powerful spectrum analyzer for multiple SDR platforms, with a PyQtGraph-based GUI for various backends.
chili-chips-ba/wireguard-fpga
A hardware implementation of the WireGuard VPN protocol using a low-cost Artix7 FPGA with an open-source toolchain.
Stay in the loop
Get weekly updates on trending AI coding tools and projects.