olofk/serv
SERV is a RISC-V CPU implementation targeting FPGA and ASIC platforms, built using Verilog.
Verilog
Hardware & IoT
Arduino & Embedded
ISC
1.8K
Stars
248
Forks
Oct 31, 2018
Created
Feb 19, 2026
Last Updated
Project Analytics
Stars Growth (1 Month)
+13
+0.7% change
Avg Daily Growth (1 Month)
+0.5
stars per day
Fork/Star Ratio (All Time)
14.1%
Good engagement
Lifetime Growth
0.7
stars/day over 2.7K days
Stars Over Time
Forks Over Time
Open Issues Over Time
Pull Requests Over Time
Commits Over Time
AI-Generated Tags
risc-v
fpga
asic
verilog
embedded
cpu
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