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google/skywater-pdk

An open-source process design kit for the SkyWater 130nm node, useful for ASIC and EDA development.

3.4K
Archived
Python
CLI Tools
API Frameworks
Python
#asic#eda#open-source

openhwgroup/cva6

A highly configurable RISC-V core suitable for application and embedded development, with Linux support.

2.8K
Active
Assembly
API Frameworks
Embedded
#risc-v#cpu#fpga

stnolting/neorv32

An open-source RISC-V soft-core CPU and MCU-like SoC written in VHDL for embedded and hardware development.

2.0K
Active
VHDL
Arduino & Embedded
CLI Tools
#risc-v#cpu#fpga

pConst/basic_verilog

A collection of essential Verilog/SystemVerilog modules for FPGA and ASIC development, including UART, SPI, and other common peripherals.

1.9K
Experimental
Verilog
API Frameworks
Arduino & Embedded
#fpga#verilog#systemverilog

olofk/serv

SERV is a RISC-V CPU implementation targeting FPGA and ASIC platforms, built using Verilog.

1.8K
Active
Verilog
Arduino & Embedded
CLI Tools
#risc-v#fpga#asic

The-OpenROAD-Project/OpenLane

An automated RTL to GDSII flow for ASIC design and optimization based on OpenROAD, Yosys, Magic, and more.

1.7K
Stable
Python
API Frameworks
Databases
#asic#rtl2gds#vlsi

ultraembedded/riscv

Open-source RISC-V CPU Core (RV32IM) for ASIC and FPGA development

1.7K
Archived
Verilog
#RISC-V#CPU Core#ASIC

clash-lang/clash-compiler

A Haskell to VHDL/Verilog/SystemVerilog compiler for ASIC and FPGA development.

1.6K
Active
Haskell
Arduino & Embedded
CLI Tools
Haskell
#hardware-description-language#fpga#asic

pulp-platform/axi

AXI SystemVerilog IP modules and verification infrastructure for high-performance on-chip communication.

1.5K
Active
SystemVerilog
IP
CLI Tools
#asic#axi#axi4

aolofsson/oh

A Verilog library for ASIC and FPGA designers, not focused on AI coding tools.

1.4K
Archived
Verilog
Embedded
API Frameworks
#verilog#fpga#asic

skot/bitaxe

Open-source ASIC Bitcoin miner hardware project focused on mining efficiency and performance.

1.3K
Stable
Raspberry Pi
Crypto Tools
#bitcoin#mining#hardware

hughperkins/VeriGPU

Open-source GPU in Verilog, loosely based on RISC-V ISA for AI acceleration and hardware design.

1.3K
Archived
SystemVerilog
React
#GPU#RISC-V#Open-source

ucb-bar/gemmini

A Scala-based hardware accelerator for deep neural networks, part of Berkeley's AI hardware research.

1.2K
Active
Scala
ML Ops
Arduino & Embedded
#accelerator#asic#dnn

ultraembedded/biriscv

A 32-bit superscalar RISC-V CPU implementation written in Verilog for FPGA and ASIC applications.

1.2K
Archived
Verilog
Embedded
API Frameworks
#risc-v#cpu#fpga

siliconcompiler/siliconcompiler

Modular hardware build system for ASIC, FPGA, and RTL development using Python, Verilog, and VHDL.

1.1K
Active
Python
Arduino & Embedded
Build Tools
#asic#cmos#eda

splinedrive/kianRiscV

RISC-V XV6/Linux SoC, a low-power, open-source CPU design for developers working on hardware and embedded systems.

1.1K
Active
Verilog
Arduino & Embedded
Linux Distros
#asic#chipdesign#cpu

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