SpinalHDL/VexRiscv
A 32-bit RISC-V CPU implementation optimized for FPGA development and integration into SoC designs.
Assembly
Hardware & IoT
Arduino & Embedded
MIT
3.0K
Stars
491
Forks
Mar 8, 2017
Created
Feb 11, 2026
Last Updated
Project Analytics
Stars Growth (1 Month)
+40
+1.3% change
Avg Daily Growth (1 Month)
+1.4
stars per day
Fork/Star Ratio (All Time)
16.1%
Good engagement
Lifetime Growth
0.9
stars/day over 3.3K days
Stars Over Time
Forks Over Time
Open Issues Over Time
Pull Requests Over Time
Commits Over Time
AI-Generated Tags
fpga
risc-v
cpu
softcore
embedded
soc
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